FPGA-based Multi-Interface Video Capture System for Hi3559
ID:43
Submission ID:171 View Protection:ATTENDEE
Updated Time:2024-09-19 14:59:06
Hits:57
Virtual Presentation
Abstract
To overcome the constraints imposed by the Hi3559 processor's limited general video interfaces and poor device compatibility, a multi-interface video capture system based on field-programmable gate arrays (FPGA) is developed. By employing asynchronous double data rate (DDR) access techniques, a decoding selection module is designed to facilitate the transformation of the four video input formats. This video capture system can accept inputs in the PAL, HDMI, Cameralink, and SDI formats. It employs an FPGA to decode these inputs and encodes them into the LVDS format for output, allowing seamless data exchange with the Hi3559 processor through the Mobile Industry Processor Interface (MIPI). The experimental results reveal that our system can precisely transcode 720p@30Hz PAL video and 1080p@60Hz Cameralink, HDMI, and SDI videos to the LVDS format which is adapted to the Hi3559 series. Video format conversion using our system is robust, ensuring smooth and uninterrupted video streaming without flickering or frame loss.
Keywords
Multi-interface,FPGA,Video format transcoding,DDR
Submission Author
Han Xiao
南京德赛西威汽车电子有限公司
Zheng Huijie
河海大学信息科学与工程学院
Min Chaobo
河海大学信息科学与工程学院
Comment submit